RTL Design | Verification | FPGA Engineer
Justin Coppola
Bachelor of Science in Electrical Engineering
May 2025
Welcome to my personal portfolio website. I am passionate about semiconductor logic, driven by a desire to solve complex problems at the hardware level. I specialize in RTL design, SystemVerilog development, Python scripting and digital verification. I'm eager to apply my experience building production-ready IP and my passion for digital systems to help shape the future of semiconductor technology.
See My Projects